Integrated circuits are usually manufactured on wafer substrates. The wafer substrate is then “diced” or “singulated” into individual dies, each die carrying a respective integrated circuit. The die is then mounted on a package substrate, often with an intermediate interposer substrate. The substrate or substrates provide structural rigidity to the resulting integrated circuit package. The package substrate may be mounted to a board, such as a motherboard.
Some package and interposer substrates are formed from ceramic materials. Ceramic interposer substrates and other ceramic substrates are made of a plurality of green sheet laminations, all of the green sheets having the same material characteristics. Each of the green sheets have the same coefficient of thermal expansion (CTE), which is a value intermediate to the CTE of the die and the CTE of the substrate or motherboard the ceramic substrate or interposer is connecting.
The die and package substrate are mechanically and electrically connected at interconnection members. Typically, the interconnection members are provided in a Controlled Collapse Chip Connection (C4) configuration, which is an array of multiple solder joints for connecting the package substrate and the die. Surface tension forces of the liquid solder support the weight of the die and control the height (collapse) of the joint. However, thermal expansivity mismatch between the die and package substrate causes a shear displacement to be applied at each of the interconnection members, which can lead to accumulated plastic deformation and eventual failure of the low-k ILD (low dielectric constant interlayer dielectric) in the die and of the package system at the interconnection members. In some cases, prior art systems have accommodated for this stress by providing underfill in the gap between the die and package substrate. But, providing underfill in the gap between the die and package substrate does not prevent failure and increases cost and manufacturing time.